A power module is limited by its hottest junction, and the thermal path from junction to coolant has several resistances in series. Getting the interface layer right is usually the cheapest place to find a few degrees.

Thermal resistance basics

The steady-state temperature rise across a layer is the product of the heat flow and the layer thermal resistance:

Rth = L / (k · A) + Rcontact
L = bond line thickness, k = thermal conductivity, A = contact area, Rcontact = interface resistance at the mating surfaces.

In a real module the resistances add up: junction-to-case, case-to-heatsink (the interface material), heatsink-to-ambient or coolant. The interface term is often the easiest to change and the most sensitive to assembly quality.

Key parameters

  • Power dissipation and its duty cycle - including switching losses, not just conduction losses.
  • Maximum junction temperature and the derating margin the design requires.
  • Coolant or ambient temperature at the worst-case condition, not the nominal one.
  • Baseplate flatness and bow - a module that bows under clamping changes the bond line.
  • Insulation requirement - many power modules need a dielectric layer in the stack.

Worked example

Take a 1200 V SiC module dissipating 150 W over a 45 x 45 mm baseplate. A 0.2 mm interface with a 3 W/m·K gap filler gives R = 0.2 / (3 x 2025) = 0.03 K/W, or about 5 C at 150 W - before contact resistance. Replacing it with a 100 W/m·K pad at 0.2 mm cuts the bulk term by more than 30x, and the remaining gap is contact resistance, which is controlled by flatness and clamp force.

Two practical architectures

A. Module - 180 W/m·K pad - heatsink

The standard high-performance configuration. A compressible pad accommodates baseplate bow and keeps the interface closed through power cycling without pump-out.

B. Module - 180 W/m·K pad - 1200 W/m·K plate - heatsink (recommended)

Where the module has multiple dies or a local hot spot, insert a graphene plate between the pad and the heatsink. The pad handles the Z-direction gap; the plate carries heat through to the heatsink so it is loaded uniformly and the hottest die does not set the limit.

Reference configurations for common SiC modules

ModuleRatingLenecold stack
Wolfspeed CAB450M12XM3450 A / 1200 VEN-PAD-100 + EN-PLT-200
Infineon FF6MR12KM1300 A / 1200 VEN-PAD-100 + EN-PLT-100
STMicroelectronics STPA1012100 A / 1200 VEN-PAD-050
Other IGBT modulesVariousContact us - die-cut to drawing

Design checklist

  • Size the interface for the worst-case bond line, not the nominal one.
  • Specify resistance at the real clamping pressure and after thermal cycling.
  • Check whether the stack needs dielectric isolation, and include it in the resistance budget.
  • Test the assembled module, not just the material sample.
Send us the drawing, not a form. Tell us the footprint, the gap, the clamping pressure and the duty cycle. We will come back with a material, a thickness and a sample - including when the honest answer is a cheaper option. Talk to engineering →

Frequently asked questions

What is a good interface thermal resistance for a SiC module?
For a high-conductivity pad at a controlled bond line, bulk resistance in the low hundredths of a K/W is achievable on a typical baseplate. The dominant remaining term is usually contact resistance, which depends on flatness and clamp force.
Do I need a graphene plate as well as a pad?
For a single small die, a pad is often enough. For multi-die modules or designs with a pronounced hot spot, adding a 1200 W/m·K plate spreads the flux and lowers the peak junction temperature.
How does baseplate bow affect the design?
A bowed baseplate increases the local bond line and contact resistance. A compressible pad with good rebound tolerates the variation better than a thin grease layer, and the design should be validated at the actual clamping pressure.
Can you supply dielectric interfaces?
Yes. Insulating layers with high breakdown voltage can be integrated into the stack; share your isolation requirement and we will propose a configuration.